Alkali CSD NVMe accelerators test platform
Introduction
Repository reference
System architecture
FPGA design
Memory map
Host Software
APU Software
RPU Software
NVMe commands and extensions
TensorFlow Lite model preparation
VTA accelerator
Operations accelerated on VTA accelerator
Flashing and connecting the Basalt board
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Alkali CSD NVMe accelerators test platform
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System architecture
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System architecture
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This chapter provides information about the architecture of the project.
FPGA design
Building the design
NVMe register module
VTA module
Built artifacts
Memory map
PCIe and NVMe Cores
VTA Cores
RPU-APU shared memory
Ramdisk area
Host Software
Building the app
Using the app
APU Software
Building the APU software
APU base system
uBPF Virtual Machine
Userspace custom NVMe command handler
RPU Software
Operating system
NVMe firmware overview
Building and running NVMe firmware
Adding support for new NVMe commands