DDRPHY

Register Listing for DDRPHY

Register

Address

DDRPHY_CSRMODULE_ENABLE_FIFOS

0xf0000800

DDRPHY_CSRMODULE_RST

0xf0000804

DDRPHY_CSRMODULE_RDIMM_MODE

0xf0000808

DDRPHY_CSRMODULE_RDPHASE

0xf000080c

DDRPHY_CSRMODULE_WRPHASE

0xf0000810

DDRPHY_CSRMODULE_ALERT

0xf0000814

DDRPHY_CSRMODULE_ALERT_REDUCE

0xf0000818

DDRPHY_CSRMODULE_SAMPLE_ALERT

0xf000081c

DDRPHY_CSRMODULE_RESET_ALERT

0xf0000820

DDRPHY_CSRMODULE_CKDLY_RST

0xf0000824

DDRPHY_CSRMODULE_CKDLY_INC

0xf0000828

DDRPHY_CSRMODULE_PREAMBLE

0xf000082c

DDRPHY_CSRMODULE_WLEVEL_EN

0xf0000830

DDRPHY_CSRMODULE_PAR_ENABLE

0xf0000834

DDRPHY_CSRMODULE_PAR_VALUE

0xf0000838

DDRPHY_CSRMODULE_DISCARD_RD_FIFO

0xf000083c

DDRPHY_CSRMODULE_DLY_SEL

0xf0000840

DDRPHY_CSRMODULE_DQ_DQS_RATIO

0xf0000844

DDRPHY_CSRMODULE_CK_RDLY_INC

0xf0000848

DDRPHY_CSRMODULE_CK_RDLY_RST

0xf000084c

DDRPHY_CSRMODULE_CK_RDDLY

0xf0000850

DDRPHY_CSRMODULE_CK_RDDLY_PREAMBLE

0xf0000854

DDRPHY_CSRMODULE_CK_WDLY_INC

0xf0000858

DDRPHY_CSRMODULE_CK_WDLY_RST

0xf000085c

DDRPHY_CSRMODULE_CK_WDLY_DQS

0xf0000860

DDRPHY_CSRMODULE_CK_WDDLY_INC

0xf0000864

DDRPHY_CSRMODULE_CK_WDDLY_RST

0xf0000868

DDRPHY_CSRMODULE_CK_WDLY_DQ

0xf000086c

DDRPHY_CSRMODULE_DQ_DLY_SEL

0xf0000870

DDRPHY_CSRMODULE_CSDLY_RST

0xf0000874

DDRPHY_CSRMODULE_CSDLY_INC

0xf0000878

DDRPHY_CSRMODULE_CADLY_RST

0xf000087c

DDRPHY_CSRMODULE_CADLY_INC

0xf0000880

DDRPHY_CSRMODULE_PARDLY_RST

0xf0000884

DDRPHY_CSRMODULE_PARDLY_INC

0xf0000888

DDRPHY_CSRMODULE_CSDLY

0xf000088c

DDRPHY_CSRMODULE_CADLY

0xf0000890

DDRPHY_CSRMODULE_RDLY_DQ_RST

0xf0000894

DDRPHY_CSRMODULE_RDLY_DQ_INC

0xf0000898

DDRPHY_CSRMODULE_RDLY_DQS_RST

0xf000089c

DDRPHY_CSRMODULE_RDLY_DQS_INC

0xf00008a0

DDRPHY_CSRMODULE_RDLY_DQS

0xf00008a4

DDRPHY_CSRMODULE_RDLY_DQ

0xf00008a8

DDRPHY_CSRMODULE_WDLY_DQ_RST

0xf00008ac

DDRPHY_CSRMODULE_WDLY_DQ_INC

0xf00008b0

DDRPHY_CSRMODULE_WDLY_DM_RST

0xf00008b4

DDRPHY_CSRMODULE_WDLY_DM_INC

0xf00008b8

DDRPHY_CSRMODULE_WDLY_DQS_RST

0xf00008bc

DDRPHY_CSRMODULE_WDLY_DQS_INC

0xf00008c0

DDRPHY_CSRMODULE_WDLY_DQS

0xf00008c4

DDRPHY_CSRMODULE_WDLY_DQ

0xf00008c8

DDRPHY_CSRMODULE_WDLY_DM

0xf00008cc

DDRPHY_CSRMODULE_ENABLE_FIFOS

Address: 0xf0000800 + 0x0 = 0xf0000800

DDRPHY_CSRMODULE_RST

Address: 0xf0000800 + 0x4 = 0xf0000804

DDRPHY_CSRMODULE_RDIMM_MODE

Address: 0xf0000800 + 0x8 = 0xf0000808

DDRPHY_CSRMODULE_RDPHASE

Address: 0xf0000800 + 0xc = 0xf000080c

DDRPHY_CSRMODULE_WRPHASE

Address: 0xf0000800 + 0x10 = 0xf0000810

DDRPHY_CSRMODULE_ALERT

Address: 0xf0000800 + 0x14 = 0xf0000814

DDRPHY_CSRMODULE_ALERT_REDUCE

Address: 0xf0000800 + 0x18 = 0xf0000818

Field

Name

Description

[0]

INITIAL_STATE

Initial value of all bits

[1]

OPERATION

0 - or (default), 1 -and

DDRPHY_CSRMODULE_SAMPLE_ALERT

Address: 0xf0000800 + 0x1c = 0xf000081c

DDRPHY_CSRMODULE_RESET_ALERT

Address: 0xf0000800 + 0x20 = 0xf0000820

DDRPHY_CSRMODULE_CKDLY_RST

Address: 0xf0000800 + 0x24 = 0xf0000824

DDRPHY_CSRMODULE_CKDLY_INC

Address: 0xf0000800 + 0x28 = 0xf0000828

DDRPHY_CSRMODULE_PREAMBLE

Address: 0xf0000800 + 0x2c = 0xf000082c

DDRPHY_CSRMODULE_WLEVEL_EN

Address: 0xf0000800 + 0x30 = 0xf0000830

DDRPHY_CSRMODULE_PAR_ENABLE

Address: 0xf0000800 + 0x34 = 0xf0000834

DDRPHY_CSRMODULE_PAR_VALUE

Address: 0xf0000800 + 0x38 = 0xf0000838

DDRPHY_CSRMODULE_DISCARD_RD_FIFO

Address: 0xf0000800 + 0x3c = 0xf000083c

DDRPHY_CSRMODULE_DLY_SEL

Address: 0xf0000800 + 0x40 = 0xf0000840

DDRPHY_CSRMODULE_DQ_DQS_RATIO

Address: 0xf0000800 + 0x44 = 0xf0000844

DDRPHY_CSRMODULE_CK_RDLY_INC

Address: 0xf0000800 + 0x48 = 0xf0000848

DDRPHY_CSRMODULE_CK_RDLY_RST

Address: 0xf0000800 + 0x4c = 0xf000084c

DDRPHY_CSRMODULE_CK_RDDLY

Address: 0xf0000800 + 0x50 = 0xf0000850

DDRPHY_CSRMODULE_CK_RDDLY_PREAMBLE

Address: 0xf0000800 + 0x54 = 0xf0000854

DDRPHY_CSRMODULE_CK_WDLY_INC

Address: 0xf0000800 + 0x58 = 0xf0000858

DDRPHY_CSRMODULE_CK_WDLY_RST

Address: 0xf0000800 + 0x5c = 0xf000085c

DDRPHY_CSRMODULE_CK_WDLY_DQS

Address: 0xf0000800 + 0x60 = 0xf0000860

DDRPHY_CSRMODULE_CK_WDDLY_INC

Address: 0xf0000800 + 0x64 = 0xf0000864

DDRPHY_CSRMODULE_CK_WDDLY_RST

Address: 0xf0000800 + 0x68 = 0xf0000868

DDRPHY_CSRMODULE_CK_WDLY_DQ

Address: 0xf0000800 + 0x6c = 0xf000086c

DDRPHY_CSRMODULE_DQ_DLY_SEL

Address: 0xf0000800 + 0x70 = 0xf0000870

DDRPHY_CSRMODULE_CSDLY_RST

Address: 0xf0000800 + 0x74 = 0xf0000874

DDRPHY_CSRMODULE_CSDLY_INC

Address: 0xf0000800 + 0x78 = 0xf0000878

DDRPHY_CSRMODULE_CADLY_RST

Address: 0xf0000800 + 0x7c = 0xf000087c

DDRPHY_CSRMODULE_CADLY_INC

Address: 0xf0000800 + 0x80 = 0xf0000880

DDRPHY_CSRMODULE_PARDLY_RST

Address: 0xf0000800 + 0x84 = 0xf0000884

DDRPHY_CSRMODULE_PARDLY_INC

Address: 0xf0000800 + 0x88 = 0xf0000888

DDRPHY_CSRMODULE_CSDLY

Address: 0xf0000800 + 0x8c = 0xf000088c

DDRPHY_CSRMODULE_CADLY

Address: 0xf0000800 + 0x90 = 0xf0000890

DDRPHY_CSRMODULE_RDLY_DQ_RST

Address: 0xf0000800 + 0x94 = 0xf0000894

DDRPHY_CSRMODULE_RDLY_DQ_INC

Address: 0xf0000800 + 0x98 = 0xf0000898

DDRPHY_CSRMODULE_RDLY_DQS_RST

Address: 0xf0000800 + 0x9c = 0xf000089c

DDRPHY_CSRMODULE_RDLY_DQS_INC

Address: 0xf0000800 + 0xa0 = 0xf00008a0

DDRPHY_CSRMODULE_RDLY_DQS

Address: 0xf0000800 + 0xa4 = 0xf00008a4

DDRPHY_CSRMODULE_RDLY_DQ

Address: 0xf0000800 + 0xa8 = 0xf00008a8

DDRPHY_CSRMODULE_WDLY_DQ_RST

Address: 0xf0000800 + 0xac = 0xf00008ac

DDRPHY_CSRMODULE_WDLY_DQ_INC

Address: 0xf0000800 + 0xb0 = 0xf00008b0

DDRPHY_CSRMODULE_WDLY_DM_RST

Address: 0xf0000800 + 0xb4 = 0xf00008b4

DDRPHY_CSRMODULE_WDLY_DM_INC

Address: 0xf0000800 + 0xb8 = 0xf00008b8

DDRPHY_CSRMODULE_WDLY_DQS_RST

Address: 0xf0000800 + 0xbc = 0xf00008bc

DDRPHY_CSRMODULE_WDLY_DQS_INC

Address: 0xf0000800 + 0xc0 = 0xf00008c0

DDRPHY_CSRMODULE_WDLY_DQS

Address: 0xf0000800 + 0xc4 = 0xf00008c4

DDRPHY_CSRMODULE_WDLY_DQ

Address: 0xf0000800 + 0xc8 = 0xf00008c8

DDRPHY_CSRMODULE_WDLY_DM

Address: 0xf0000800 + 0xcc = 0xf00008cc


Last update: 2024-11-07