SDRAM

Register Listing for SDRAM

Register

Address

SDRAM_DFII_CONTROL

0xf0007000

SDRAM_DFII_FORCE_ISSUE

0xf0007004

SDRAM_DFII_A_CMDINJECTOR_COMMAND_STORAGE

0xf0007008

SDRAM_DFII_A_CMDINJECTOR_COMMAND_STORAGE_WR_MASK

0xf000700c

SDRAM_DFII_A_CMDINJECTOR_PHASE_ADDR

0xf0007010

SDRAM_DFII_A_CMDINJECTOR_STORE_CONTINUOUS_CMD

0xf0007014

SDRAM_DFII_A_CMDINJECTOR_STORE_SINGLESHOT_CMD

0xf0007018

SDRAM_DFII_A_CMDINJECTOR_SINGLE_SHOT

0xf000701c

SDRAM_DFII_A_CMDINJECTOR_ISSUE_COMMAND

0xf0007020

SDRAM_DFII_A_CMDINJECTOR_WRDATA_SELECT

0xf0007024

SDRAM_DFII_A_CMDINJECTOR_WRDATA

0xf0007028

SDRAM_DFII_A_CMDINJECTOR_WRDATA_S

0xf000702c

SDRAM_DFII_A_CMDINJECTOR_WRDATA_STORE

0xf0007030

SDRAM_DFII_A_CMDINJECTOR_SETUP

0xf0007034

SDRAM_DFII_A_CMDINJECTOR_SAMPLE

0xf0007038

SDRAM_DFII_A_CMDINJECTOR_RESULT_ARRAY

0xf000703c

SDRAM_DFII_A_CMDINJECTOR_RESET

0xf0007040

SDRAM_DFII_A_CMDINJECTOR_RDDATA_SELECT

0xf0007044

SDRAM_DFII_A_CMDINJECTOR_RDDATA_CAPTURE_CNT

0xf0007048

SDRAM_DFII_A_CMDINJECTOR_RDDATA

0xf000704c

SDRAM_DFII_B_CMDINJECTOR_COMMAND_STORAGE

0xf0007050

SDRAM_DFII_B_CMDINJECTOR_COMMAND_STORAGE_WR_MASK

0xf0007054

SDRAM_DFII_B_CMDINJECTOR_PHASE_ADDR

0xf0007058

SDRAM_DFII_B_CMDINJECTOR_STORE_CONTINUOUS_CMD

0xf000705c

SDRAM_DFII_B_CMDINJECTOR_STORE_SINGLESHOT_CMD

0xf0007060

SDRAM_DFII_B_CMDINJECTOR_SINGLE_SHOT

0xf0007064

SDRAM_DFII_B_CMDINJECTOR_ISSUE_COMMAND

0xf0007068

SDRAM_DFII_B_CMDINJECTOR_WRDATA_SELECT

0xf000706c

SDRAM_DFII_B_CMDINJECTOR_WRDATA

0xf0007070

SDRAM_DFII_B_CMDINJECTOR_WRDATA_S

0xf0007074

SDRAM_DFII_B_CMDINJECTOR_WRDATA_STORE

0xf0007078

SDRAM_DFII_B_CMDINJECTOR_SETUP

0xf000707c

SDRAM_DFII_B_CMDINJECTOR_SAMPLE

0xf0007080

SDRAM_DFII_B_CMDINJECTOR_RESULT_ARRAY

0xf0007084

SDRAM_DFII_B_CMDINJECTOR_RESET

0xf0007088

SDRAM_DFII_B_CMDINJECTOR_RDDATA_SELECT

0xf000708c

SDRAM_DFII_B_CMDINJECTOR_RDDATA_CAPTURE_CNT

0xf0007090

SDRAM_DFII_B_CMDINJECTOR_RDDATA

0xf0007094

SDRAM_CONTROLLER_TRP

0xf0007098

SDRAM_CONTROLLER_TRCD

0xf000709c

SDRAM_CONTROLLER_TWR

0xf00070a0

SDRAM_CONTROLLER_TWTR

0xf00070a4

SDRAM_CONTROLLER_TREFI

0xf00070a8

SDRAM_CONTROLLER_TRFC

0xf00070ac

SDRAM_CONTROLLER_TFAW

0xf00070b0

SDRAM_CONTROLLER_TCCD

0xf00070b4

SDRAM_CONTROLLER_TCCD_WR

0xf00070b8

SDRAM_CONTROLLER_TRTP

0xf00070bc

SDRAM_CONTROLLER_TRRD

0xf00070c0

SDRAM_CONTROLLER_TRC

0xf00070c4

SDRAM_CONTROLLER_TRAS

0xf00070c8

SDRAM_CONTROLLER_LAST_ADDR_0

0xf00070cc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_0

0xf00070d0

SDRAM_CONTROLLER_LAST_ADDR_1

0xf00070d4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_1

0xf00070d8

SDRAM_CONTROLLER_LAST_ADDR_2

0xf00070dc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_2

0xf00070e0

SDRAM_CONTROLLER_LAST_ADDR_3

0xf00070e4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_3

0xf00070e8

SDRAM_CONTROLLER_LAST_ADDR_4

0xf00070ec

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_4

0xf00070f0

SDRAM_CONTROLLER_LAST_ADDR_5

0xf00070f4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_5

0xf00070f8

SDRAM_CONTROLLER_LAST_ADDR_6

0xf00070fc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_6

0xf0007100

SDRAM_CONTROLLER_LAST_ADDR_7

0xf0007104

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_7

0xf0007108

SDRAM_CONTROLLER_LAST_ADDR_8

0xf000710c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_8

0xf0007110

SDRAM_CONTROLLER_LAST_ADDR_9

0xf0007114

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_9

0xf0007118

SDRAM_CONTROLLER_LAST_ADDR_10

0xf000711c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_10

0xf0007120

SDRAM_CONTROLLER_LAST_ADDR_11

0xf0007124

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_11

0xf0007128

SDRAM_CONTROLLER_LAST_ADDR_12

0xf000712c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_12

0xf0007130

SDRAM_CONTROLLER_LAST_ADDR_13

0xf0007134

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_13

0xf0007138

SDRAM_CONTROLLER_LAST_ADDR_14

0xf000713c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_14

0xf0007140

SDRAM_CONTROLLER_LAST_ADDR_15

0xf0007144

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_15

0xf0007148

SDRAM_CONTROLLER_LAST_ADDR_16

0xf000714c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_16

0xf0007150

SDRAM_CONTROLLER_LAST_ADDR_17

0xf0007154

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_17

0xf0007158

SDRAM_CONTROLLER_LAST_ADDR_18

0xf000715c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_18

0xf0007160

SDRAM_CONTROLLER_LAST_ADDR_19

0xf0007164

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_19

0xf0007168

SDRAM_CONTROLLER_LAST_ADDR_20

0xf000716c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_20

0xf0007170

SDRAM_CONTROLLER_LAST_ADDR_21

0xf0007174

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_21

0xf0007178

SDRAM_CONTROLLER_LAST_ADDR_22

0xf000717c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_22

0xf0007180

SDRAM_CONTROLLER_LAST_ADDR_23

0xf0007184

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_23

0xf0007188

SDRAM_CONTROLLER_LAST_ADDR_24

0xf000718c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_24

0xf0007190

SDRAM_CONTROLLER_LAST_ADDR_25

0xf0007194

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_25

0xf0007198

SDRAM_CONTROLLER_LAST_ADDR_26

0xf000719c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_26

0xf00071a0

SDRAM_CONTROLLER_LAST_ADDR_27

0xf00071a4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_27

0xf00071a8

SDRAM_CONTROLLER_LAST_ADDR_28

0xf00071ac

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_28

0xf00071b0

SDRAM_CONTROLLER_LAST_ADDR_29

0xf00071b4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_29

0xf00071b8

SDRAM_CONTROLLER_LAST_ADDR_30

0xf00071bc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_30

0xf00071c0

SDRAM_CONTROLLER_LAST_ADDR_31

0xf00071c4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_31

0xf00071c8

SDRAM_DFII_CONTROL

Address: 0xf0007000 + 0x0 = 0xf0007000

Control DFI signals common to all phases

Field

Name

Description

[0]

SEL

Value

Description

0b0

Software (CPU) control.

0b1

Hardware control (default).

[1]

CKE

DFI clock enable bus

[2]

ODT

DFI on-die termination bus

[3]

RESET_N

DFI clock reset bus

[4]

MODE_2N

Value

Description

0b0

In 1N mode

0b1

In 2N mode (Default)

[5]

A_CONTROL

Value

Description

0b1

A_Cmd Injector

[6]

B_CONTROL

Value

Description

0b1

B_Cmd Injector

SDRAM_DFII_FORCE_ISSUE

Address: 0xf0007000 + 0x4 = 0xf0007004

SDRAM_DFII_A_CMDINJECTOR_COMMAND_STORAGE

Address: 0xf0007000 + 0x8 = 0xf0007008

DDR5 command and control signals

Field

Name

Description

[13:0]

CA

Command/Address bus

[15:14]

CS

DFI chip select bus

SDRAM_DFII_A_CMDINJECTOR_COMMAND_STORAGE_WR_MASK

Address: 0xf0007000 + 0xc = 0xf000700c

DDR5 wrdata mask control signals

Field

Name

Description

SDRAM_DFII_A_CMDINJECTOR_PHASE_ADDR

Address: 0xf0007000 + 0x10 = 0xf0007010

SDRAM_DFII_A_CMDINJECTOR_STORE_CONTINUOUS_CMD

Address: 0xf0007000 + 0x14 = 0xf0007014

SDRAM_DFII_A_CMDINJECTOR_STORE_SINGLESHOT_CMD

Address: 0xf0007000 + 0x18 = 0xf0007018

SDRAM_DFII_A_CMDINJECTOR_SINGLE_SHOT

Address: 0xf0007000 + 0x1c = 0xf000701c

SDRAM_DFII_A_CMDINJECTOR_ISSUE_COMMAND

Address: 0xf0007000 + 0x20 = 0xf0007020

SDRAM_DFII_A_CMDINJECTOR_WRDATA_SELECT

Address: 0xf0007000 + 0x24 = 0xf0007024

SDRAM_DFII_A_CMDINJECTOR_WRDATA

Address: 0xf0007000 + 0x28 = 0xf0007028

SDRAM_DFII_A_CMDINJECTOR_WRDATA_S

Address: 0xf0007000 + 0x2c = 0xf000702c

SDRAM_DFII_A_CMDINJECTOR_WRDATA_STORE

Address: 0xf0007000 + 0x30 = 0xf0007030

SDRAM_DFII_A_CMDINJECTOR_SETUP

Address: 0xf0007000 + 0x34 = 0xf0007034

Field

Name

Description

[0]

INITIAL_STATE

Initial value of all bits

[1]

OPERATION

0 - or (default), 1 -and

SDRAM_DFII_A_CMDINJECTOR_SAMPLE

Address: 0xf0007000 + 0x38 = 0xf0007038

SDRAM_DFII_A_CMDINJECTOR_RESULT_ARRAY

Address: 0xf0007000 + 0x3c = 0xf000703c

SDRAM_DFII_A_CMDINJECTOR_RESET

Address: 0xf0007000 + 0x40 = 0xf0007040

SDRAM_DFII_A_CMDINJECTOR_RDDATA_SELECT

Address: 0xf0007000 + 0x44 = 0xf0007044

SDRAM_DFII_A_CMDINJECTOR_RDDATA_CAPTURE_CNT

Address: 0xf0007000 + 0x48 = 0xf0007048

SDRAM_DFII_A_CMDINJECTOR_RDDATA

Address: 0xf0007000 + 0x4c = 0xf000704c

SDRAM_DFII_B_CMDINJECTOR_COMMAND_STORAGE

Address: 0xf0007000 + 0x50 = 0xf0007050

DDR5 command and control signals

Field

Name

Description

[13:0]

CA

Command/Address bus

[15:14]

CS

DFI chip select bus

SDRAM_DFII_B_CMDINJECTOR_COMMAND_STORAGE_WR_MASK

Address: 0xf0007000 + 0x54 = 0xf0007054

DDR5 wrdata mask control signals

Field

Name

Description

SDRAM_DFII_B_CMDINJECTOR_PHASE_ADDR

Address: 0xf0007000 + 0x58 = 0xf0007058

SDRAM_DFII_B_CMDINJECTOR_STORE_CONTINUOUS_CMD

Address: 0xf0007000 + 0x5c = 0xf000705c

SDRAM_DFII_B_CMDINJECTOR_STORE_SINGLESHOT_CMD

Address: 0xf0007000 + 0x60 = 0xf0007060

SDRAM_DFII_B_CMDINJECTOR_SINGLE_SHOT

Address: 0xf0007000 + 0x64 = 0xf0007064

SDRAM_DFII_B_CMDINJECTOR_ISSUE_COMMAND

Address: 0xf0007000 + 0x68 = 0xf0007068

SDRAM_DFII_B_CMDINJECTOR_WRDATA_SELECT

Address: 0xf0007000 + 0x6c = 0xf000706c

SDRAM_DFII_B_CMDINJECTOR_WRDATA

Address: 0xf0007000 + 0x70 = 0xf0007070

SDRAM_DFII_B_CMDINJECTOR_WRDATA_S

Address: 0xf0007000 + 0x74 = 0xf0007074

SDRAM_DFII_B_CMDINJECTOR_WRDATA_STORE

Address: 0xf0007000 + 0x78 = 0xf0007078

SDRAM_DFII_B_CMDINJECTOR_SETUP

Address: 0xf0007000 + 0x7c = 0xf000707c

Field

Name

Description

[0]

INITIAL_STATE

Initial value of all bits

[1]

OPERATION

0 - or (default), 1 -and

SDRAM_DFII_B_CMDINJECTOR_SAMPLE

Address: 0xf0007000 + 0x80 = 0xf0007080

SDRAM_DFII_B_CMDINJECTOR_RESULT_ARRAY

Address: 0xf0007000 + 0x84 = 0xf0007084

SDRAM_DFII_B_CMDINJECTOR_RESET

Address: 0xf0007000 + 0x88 = 0xf0007088

SDRAM_DFII_B_CMDINJECTOR_RDDATA_SELECT

Address: 0xf0007000 + 0x8c = 0xf000708c

SDRAM_DFII_B_CMDINJECTOR_RDDATA_CAPTURE_CNT

Address: 0xf0007000 + 0x90 = 0xf0007090

SDRAM_DFII_B_CMDINJECTOR_RDDATA

Address: 0xf0007000 + 0x94 = 0xf0007094

SDRAM_CONTROLLER_TRP

Address: 0xf0007000 + 0x98 = 0xf0007098

SDRAM_CONTROLLER_TRCD

Address: 0xf0007000 + 0x9c = 0xf000709c

SDRAM_CONTROLLER_TWR

Address: 0xf0007000 + 0xa0 = 0xf00070a0

SDRAM_CONTROLLER_TWTR

Address: 0xf0007000 + 0xa4 = 0xf00070a4

SDRAM_CONTROLLER_TREFI

Address: 0xf0007000 + 0xa8 = 0xf00070a8

SDRAM_CONTROLLER_TRFC

Address: 0xf0007000 + 0xac = 0xf00070ac

SDRAM_CONTROLLER_TFAW

Address: 0xf0007000 + 0xb0 = 0xf00070b0

SDRAM_CONTROLLER_TCCD

Address: 0xf0007000 + 0xb4 = 0xf00070b4

SDRAM_CONTROLLER_TCCD_WR

Address: 0xf0007000 + 0xb8 = 0xf00070b8

SDRAM_CONTROLLER_TRTP

Address: 0xf0007000 + 0xbc = 0xf00070bc

SDRAM_CONTROLLER_TRRD

Address: 0xf0007000 + 0xc0 = 0xf00070c0

SDRAM_CONTROLLER_TRC

Address: 0xf0007000 + 0xc4 = 0xf00070c4

SDRAM_CONTROLLER_TRAS

Address: 0xf0007000 + 0xc8 = 0xf00070c8

SDRAM_CONTROLLER_LAST_ADDR_0

Address: 0xf0007000 + 0xcc = 0xf00070cc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_0

Address: 0xf0007000 + 0xd0 = 0xf00070d0

SDRAM_CONTROLLER_LAST_ADDR_1

Address: 0xf0007000 + 0xd4 = 0xf00070d4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_1

Address: 0xf0007000 + 0xd8 = 0xf00070d8

SDRAM_CONTROLLER_LAST_ADDR_2

Address: 0xf0007000 + 0xdc = 0xf00070dc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_2

Address: 0xf0007000 + 0xe0 = 0xf00070e0

SDRAM_CONTROLLER_LAST_ADDR_3

Address: 0xf0007000 + 0xe4 = 0xf00070e4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_3

Address: 0xf0007000 + 0xe8 = 0xf00070e8

SDRAM_CONTROLLER_LAST_ADDR_4

Address: 0xf0007000 + 0xec = 0xf00070ec

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_4

Address: 0xf0007000 + 0xf0 = 0xf00070f0

SDRAM_CONTROLLER_LAST_ADDR_5

Address: 0xf0007000 + 0xf4 = 0xf00070f4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_5

Address: 0xf0007000 + 0xf8 = 0xf00070f8

SDRAM_CONTROLLER_LAST_ADDR_6

Address: 0xf0007000 + 0xfc = 0xf00070fc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_6

Address: 0xf0007000 + 0x100 = 0xf0007100

SDRAM_CONTROLLER_LAST_ADDR_7

Address: 0xf0007000 + 0x104 = 0xf0007104

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_7

Address: 0xf0007000 + 0x108 = 0xf0007108

SDRAM_CONTROLLER_LAST_ADDR_8

Address: 0xf0007000 + 0x10c = 0xf000710c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_8

Address: 0xf0007000 + 0x110 = 0xf0007110

SDRAM_CONTROLLER_LAST_ADDR_9

Address: 0xf0007000 + 0x114 = 0xf0007114

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_9

Address: 0xf0007000 + 0x118 = 0xf0007118

SDRAM_CONTROLLER_LAST_ADDR_10

Address: 0xf0007000 + 0x11c = 0xf000711c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_10

Address: 0xf0007000 + 0x120 = 0xf0007120

SDRAM_CONTROLLER_LAST_ADDR_11

Address: 0xf0007000 + 0x124 = 0xf0007124

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_11

Address: 0xf0007000 + 0x128 = 0xf0007128

SDRAM_CONTROLLER_LAST_ADDR_12

Address: 0xf0007000 + 0x12c = 0xf000712c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_12

Address: 0xf0007000 + 0x130 = 0xf0007130

SDRAM_CONTROLLER_LAST_ADDR_13

Address: 0xf0007000 + 0x134 = 0xf0007134

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_13

Address: 0xf0007000 + 0x138 = 0xf0007138

SDRAM_CONTROLLER_LAST_ADDR_14

Address: 0xf0007000 + 0x13c = 0xf000713c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_14

Address: 0xf0007000 + 0x140 = 0xf0007140

SDRAM_CONTROLLER_LAST_ADDR_15

Address: 0xf0007000 + 0x144 = 0xf0007144

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_15

Address: 0xf0007000 + 0x148 = 0xf0007148

SDRAM_CONTROLLER_LAST_ADDR_16

Address: 0xf0007000 + 0x14c = 0xf000714c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_16

Address: 0xf0007000 + 0x150 = 0xf0007150

SDRAM_CONTROLLER_LAST_ADDR_17

Address: 0xf0007000 + 0x154 = 0xf0007154

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_17

Address: 0xf0007000 + 0x158 = 0xf0007158

SDRAM_CONTROLLER_LAST_ADDR_18

Address: 0xf0007000 + 0x15c = 0xf000715c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_18

Address: 0xf0007000 + 0x160 = 0xf0007160

SDRAM_CONTROLLER_LAST_ADDR_19

Address: 0xf0007000 + 0x164 = 0xf0007164

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_19

Address: 0xf0007000 + 0x168 = 0xf0007168

SDRAM_CONTROLLER_LAST_ADDR_20

Address: 0xf0007000 + 0x16c = 0xf000716c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_20

Address: 0xf0007000 + 0x170 = 0xf0007170

SDRAM_CONTROLLER_LAST_ADDR_21

Address: 0xf0007000 + 0x174 = 0xf0007174

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_21

Address: 0xf0007000 + 0x178 = 0xf0007178

SDRAM_CONTROLLER_LAST_ADDR_22

Address: 0xf0007000 + 0x17c = 0xf000717c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_22

Address: 0xf0007000 + 0x180 = 0xf0007180

SDRAM_CONTROLLER_LAST_ADDR_23

Address: 0xf0007000 + 0x184 = 0xf0007184

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_23

Address: 0xf0007000 + 0x188 = 0xf0007188

SDRAM_CONTROLLER_LAST_ADDR_24

Address: 0xf0007000 + 0x18c = 0xf000718c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_24

Address: 0xf0007000 + 0x190 = 0xf0007190

SDRAM_CONTROLLER_LAST_ADDR_25

Address: 0xf0007000 + 0x194 = 0xf0007194

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_25

Address: 0xf0007000 + 0x198 = 0xf0007198

SDRAM_CONTROLLER_LAST_ADDR_26

Address: 0xf0007000 + 0x19c = 0xf000719c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_26

Address: 0xf0007000 + 0x1a0 = 0xf00071a0

SDRAM_CONTROLLER_LAST_ADDR_27

Address: 0xf0007000 + 0x1a4 = 0xf00071a4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_27

Address: 0xf0007000 + 0x1a8 = 0xf00071a8

SDRAM_CONTROLLER_LAST_ADDR_28

Address: 0xf0007000 + 0x1ac = 0xf00071ac

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_28

Address: 0xf0007000 + 0x1b0 = 0xf00071b0

SDRAM_CONTROLLER_LAST_ADDR_29

Address: 0xf0007000 + 0x1b4 = 0xf00071b4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_29

Address: 0xf0007000 + 0x1b8 = 0xf00071b8

SDRAM_CONTROLLER_LAST_ADDR_30

Address: 0xf0007000 + 0x1bc = 0xf00071bc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_30

Address: 0xf0007000 + 0x1c0 = 0xf00071c0

SDRAM_CONTROLLER_LAST_ADDR_31

Address: 0xf0007000 + 0x1c4 = 0xf00071c4

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_31

Address: 0xf0007000 + 0x1c8 = 0xf00071c8


Last update: 2024-12-18