SDRAM¶

Register Listing for SDRAM¶

SDRAM_DFII_CONTROL¶

Address: 0xf0006000 + 0x0 = 0xf0006000

Control DFI signals common to all phases

SDRAM_DFII_PI0_COMMAND¶

Address: 0xf0006000 + 0x4 = 0xf0006004

Control DFI signals on a single phase

SDRAM_DFII_PI0_COMMAND_ISSUE¶

Address: 0xf0006000 + 0x8 = 0xf0006008

SDRAM_DFII_PI0_ADDRESS¶

Address: 0xf0006000 + 0xc = 0xf000600c

DFI address bus

SDRAM_DFII_PI0_BADDRESS¶

Address: 0xf0006000 + 0x10 = 0xf0006010

DFI bank address bus

SDRAM_DFII_PI0_WRDATA3¶

Address: 0xf0006000 + 0x14 = 0xf0006014

Bits 96-127 of SDRAM_DFII_PI0_WRDATA. DFI write data bus

SDRAM_DFII_PI0_WRDATA2¶

Address: 0xf0006000 + 0x18 = 0xf0006018

Bits 64-95 of SDRAM_DFII_PI0_WRDATA.

SDRAM_DFII_PI0_WRDATA1¶

Address: 0xf0006000 + 0x1c = 0xf000601c

Bits 32-63 of SDRAM_DFII_PI0_WRDATA.

SDRAM_DFII_PI0_WRDATA0¶

Address: 0xf0006000 + 0x20 = 0xf0006020

Bits 0-31 of SDRAM_DFII_PI0_WRDATA.

SDRAM_DFII_PI0_RDDATA3¶

Address: 0xf0006000 + 0x24 = 0xf0006024

Bits 96-127 of SDRAM_DFII_PI0_RDDATA. DFI read data bus

SDRAM_DFII_PI0_RDDATA2¶

Address: 0xf0006000 + 0x28 = 0xf0006028

Bits 64-95 of SDRAM_DFII_PI0_RDDATA.

SDRAM_DFII_PI0_RDDATA1¶

Address: 0xf0006000 + 0x2c = 0xf000602c

Bits 32-63 of SDRAM_DFII_PI0_RDDATA.

SDRAM_DFII_PI0_RDDATA0¶

Address: 0xf0006000 + 0x30 = 0xf0006030

Bits 0-31 of SDRAM_DFII_PI0_RDDATA.

SDRAM_DFII_PI1_COMMAND¶

Address: 0xf0006000 + 0x34 = 0xf0006034

Control DFI signals on a single phase

SDRAM_DFII_PI1_COMMAND_ISSUE¶

Address: 0xf0006000 + 0x38 = 0xf0006038

SDRAM_DFII_PI1_ADDRESS¶

Address: 0xf0006000 + 0x3c = 0xf000603c

DFI address bus

SDRAM_DFII_PI1_BADDRESS¶

Address: 0xf0006000 + 0x40 = 0xf0006040

DFI bank address bus

SDRAM_DFII_PI1_WRDATA3¶

Address: 0xf0006000 + 0x44 = 0xf0006044

Bits 96-127 of SDRAM_DFII_PI1_WRDATA. DFI write data bus

SDRAM_DFII_PI1_WRDATA2¶

Address: 0xf0006000 + 0x48 = 0xf0006048

Bits 64-95 of SDRAM_DFII_PI1_WRDATA.

SDRAM_DFII_PI1_WRDATA1¶

Address: 0xf0006000 + 0x4c = 0xf000604c

Bits 32-63 of SDRAM_DFII_PI1_WRDATA.

SDRAM_DFII_PI1_WRDATA0¶

Address: 0xf0006000 + 0x50 = 0xf0006050

Bits 0-31 of SDRAM_DFII_PI1_WRDATA.

SDRAM_DFII_PI1_RDDATA3¶

Address: 0xf0006000 + 0x54 = 0xf0006054

Bits 96-127 of SDRAM_DFII_PI1_RDDATA. DFI read data bus

SDRAM_DFII_PI1_RDDATA2¶

Address: 0xf0006000 + 0x58 = 0xf0006058

Bits 64-95 of SDRAM_DFII_PI1_RDDATA.

SDRAM_DFII_PI1_RDDATA1¶

Address: 0xf0006000 + 0x5c = 0xf000605c

Bits 32-63 of SDRAM_DFII_PI1_RDDATA.

SDRAM_DFII_PI1_RDDATA0¶

Address: 0xf0006000 + 0x60 = 0xf0006060

Bits 0-31 of SDRAM_DFII_PI1_RDDATA.

SDRAM_DFII_PI2_COMMAND¶

Address: 0xf0006000 + 0x64 = 0xf0006064

Control DFI signals on a single phase

SDRAM_DFII_PI2_COMMAND_ISSUE¶

Address: 0xf0006000 + 0x68 = 0xf0006068

SDRAM_DFII_PI2_ADDRESS¶

Address: 0xf0006000 + 0x6c = 0xf000606c

DFI address bus

SDRAM_DFII_PI2_BADDRESS¶

Address: 0xf0006000 + 0x70 = 0xf0006070

DFI bank address bus

SDRAM_DFII_PI2_WRDATA3¶

Address: 0xf0006000 + 0x74 = 0xf0006074

Bits 96-127 of SDRAM_DFII_PI2_WRDATA. DFI write data bus

SDRAM_DFII_PI2_WRDATA2¶

Address: 0xf0006000 + 0x78 = 0xf0006078

Bits 64-95 of SDRAM_DFII_PI2_WRDATA.

SDRAM_DFII_PI2_WRDATA1¶

Address: 0xf0006000 + 0x7c = 0xf000607c

Bits 32-63 of SDRAM_DFII_PI2_WRDATA.

SDRAM_DFII_PI2_WRDATA0¶

Address: 0xf0006000 + 0x80 = 0xf0006080

Bits 0-31 of SDRAM_DFII_PI2_WRDATA.

SDRAM_DFII_PI2_RDDATA3¶

Address: 0xf0006000 + 0x84 = 0xf0006084

Bits 96-127 of SDRAM_DFII_PI2_RDDATA. DFI read data bus

SDRAM_DFII_PI2_RDDATA2¶

Address: 0xf0006000 + 0x88 = 0xf0006088

Bits 64-95 of SDRAM_DFII_PI2_RDDATA.

SDRAM_DFII_PI2_RDDATA1¶

Address: 0xf0006000 + 0x8c = 0xf000608c

Bits 32-63 of SDRAM_DFII_PI2_RDDATA.

SDRAM_DFII_PI2_RDDATA0¶

Address: 0xf0006000 + 0x90 = 0xf0006090

Bits 0-31 of SDRAM_DFII_PI2_RDDATA.

SDRAM_DFII_PI3_COMMAND¶

Address: 0xf0006000 + 0x94 = 0xf0006094

Control DFI signals on a single phase

SDRAM_DFII_PI3_COMMAND_ISSUE¶

Address: 0xf0006000 + 0x98 = 0xf0006098

SDRAM_DFII_PI3_ADDRESS¶

Address: 0xf0006000 + 0x9c = 0xf000609c

DFI address bus

SDRAM_DFII_PI3_BADDRESS¶

Address: 0xf0006000 + 0xa0 = 0xf00060a0

DFI bank address bus

SDRAM_DFII_PI3_WRDATA3¶

Address: 0xf0006000 + 0xa4 = 0xf00060a4

Bits 96-127 of SDRAM_DFII_PI3_WRDATA. DFI write data bus

SDRAM_DFII_PI3_WRDATA2¶

Address: 0xf0006000 + 0xa8 = 0xf00060a8

Bits 64-95 of SDRAM_DFII_PI3_WRDATA.

SDRAM_DFII_PI3_WRDATA1¶

Address: 0xf0006000 + 0xac = 0xf00060ac

Bits 32-63 of SDRAM_DFII_PI3_WRDATA.

SDRAM_DFII_PI3_WRDATA0¶

Address: 0xf0006000 + 0xb0 = 0xf00060b0

Bits 0-31 of SDRAM_DFII_PI3_WRDATA.

SDRAM_DFII_PI3_RDDATA3¶

Address: 0xf0006000 + 0xb4 = 0xf00060b4

Bits 96-127 of SDRAM_DFII_PI3_RDDATA. DFI read data bus

SDRAM_DFII_PI3_RDDATA2¶

Address: 0xf0006000 + 0xb8 = 0xf00060b8

Bits 64-95 of SDRAM_DFII_PI3_RDDATA.

SDRAM_DFII_PI3_RDDATA1¶

Address: 0xf0006000 + 0xbc = 0xf00060bc

Bits 32-63 of SDRAM_DFII_PI3_RDDATA.

SDRAM_DFII_PI3_RDDATA0¶

Address: 0xf0006000 + 0xc0 = 0xf00060c0

Bits 0-31 of SDRAM_DFII_PI3_RDDATA.

SDRAM_CONTROLLER_TRP¶

Address: 0xf0006000 + 0xc4 = 0xf00060c4

SDRAM_CONTROLLER_TRCD¶

Address: 0xf0006000 + 0xc8 = 0xf00060c8

SDRAM_CONTROLLER_TWR¶

Address: 0xf0006000 + 0xcc = 0xf00060cc

SDRAM_CONTROLLER_TWTR¶

Address: 0xf0006000 + 0xd0 = 0xf00060d0

SDRAM_CONTROLLER_TREFI¶

Address: 0xf0006000 + 0xd4 = 0xf00060d4

SDRAM_CONTROLLER_TRFC¶

Address: 0xf0006000 + 0xd8 = 0xf00060d8

SDRAM_CONTROLLER_TFAW¶

Address: 0xf0006000 + 0xdc = 0xf00060dc

SDRAM_CONTROLLER_TCCD¶

Address: 0xf0006000 + 0xe0 = 0xf00060e0

SDRAM_CONTROLLER_TCCD_WR¶

Address: 0xf0006000 + 0xe4 = 0xf00060e4

SDRAM_CONTROLLER_TRTP¶

Address: 0xf0006000 + 0xe8 = 0xf00060e8

SDRAM_CONTROLLER_TRRD¶

Address: 0xf0006000 + 0xec = 0xf00060ec

SDRAM_CONTROLLER_TRC¶

Address: 0xf0006000 + 0xf0 = 0xf00060f0

SDRAM_CONTROLLER_TRAS¶

Address: 0xf0006000 + 0xf4 = 0xf00060f4

SDRAM_CONTROLLER_TZQCS¶

Address: 0xf0006000 + 0xf8 = 0xf00060f8

SDRAM_CONTROLLER_LAST_ADDR_0¶

Address: 0xf0006000 + 0xfc = 0xf00060fc

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_0¶

Address: 0xf0006000 + 0x100 = 0xf0006100

SDRAM_CONTROLLER_LAST_ADDR_1¶

Address: 0xf0006000 + 0x104 = 0xf0006104

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_1¶

Address: 0xf0006000 + 0x108 = 0xf0006108

SDRAM_CONTROLLER_LAST_ADDR_2¶

Address: 0xf0006000 + 0x10c = 0xf000610c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_2¶

Address: 0xf0006000 + 0x110 = 0xf0006110

SDRAM_CONTROLLER_LAST_ADDR_3¶

Address: 0xf0006000 + 0x114 = 0xf0006114

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_3¶

Address: 0xf0006000 + 0x118 = 0xf0006118

SDRAM_CONTROLLER_LAST_ADDR_4¶

Address: 0xf0006000 + 0x11c = 0xf000611c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_4¶

Address: 0xf0006000 + 0x120 = 0xf0006120

SDRAM_CONTROLLER_LAST_ADDR_5¶

Address: 0xf0006000 + 0x124 = 0xf0006124

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_5¶

Address: 0xf0006000 + 0x128 = 0xf0006128

SDRAM_CONTROLLER_LAST_ADDR_6¶

Address: 0xf0006000 + 0x12c = 0xf000612c

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_6¶

Address: 0xf0006000 + 0x130 = 0xf0006130

SDRAM_CONTROLLER_LAST_ADDR_7¶

Address: 0xf0006000 + 0x134 = 0xf0006134

SDRAM_CONTROLLER_LAST_ACTIVE_ROW_7¶

Address: 0xf0006000 + 0x138 = 0xf0006138