DFI_SWITCH¶
Register Listing for DFI_SWITCH¶
Register |
Address |
---|---|
DFI_SWITCH_REFRESH_COUNT1¶
Address: 0xf0004000 + 0x0 = 0xf0004000
Bits 32-63 of DFI_SWITCH_REFRESH_COUNT. Count of all refresh commands issued (both by Memory Controller and the Payload Executor). Value is latched from internal counter on mode transition: MC -> PE or by writing to the refresh_update CSR.
DFI_SWITCH_REFRESH_COUNT0¶
Address: 0xf0004000 + 0x4 = 0xf0004004
Bits 0-31 of DFI_SWITCH_REFRESH_COUNT.
DFI_SWITCH_AT_REFRESH1¶
Address: 0xf0004000 + 0x8 = 0xf0004008
Bits 32-63 of DFI_SWITCH_AT_REFRESH. If set to a value different than 0 the mode transition MC -> PE will be performed only when the value of this register matches the current refresh commands count.
DFI_SWITCH_AT_REFRESH0¶
Address: 0xf0004000 + 0xc = 0xf000400c
Bits 0-31 of DFI_SWITCH_AT_REFRESH.
DFI_SWITCH_REFRESH_UPDATE¶
Address: 0xf0004000 + 0x10 = 0xf0004010
Force an update of the refresh_count CSR.